Capacitor Farads and Voltage Ratings: Derating Practices PCB Buyers Need

Practical capacitor capacitance and voltage selection for PCB/PCBA buyers: what farads mean, voltage margins, MLCC bias, and BOM fields that prevent wrong parts.

Last updated
  • capacitor
  • voltage rating
  • derating
  • MLCC
SMT assembly context for capacitor placement and power integrity parts

A marking like 100uF 25V looks simple until a 12V industrial rail browns out under load because the bulk capacitor was undersized after temperature derating, or a 10uF X5R 0402 collapses to a fraction of its labeled value under DC bias. Farads describe storage capability; voltage ratings describe a safety ceiling. PCB buyers need both--plus the derating behavior the silkscreen never shows.

Farad means charge storage, not "more is always better"

Capacitance relates stored charge to voltage (Q = C x V). Board-level parts use uF, nF, and pF. Bulk electrolytics and large ceramics smooth supply rails; mid-values couple or filter; picofarads tune RF and crystals. Oversizing bulk capacitance can worsen inrush and upset some regulator compensation networks. Follow the IC datasheet first, then apply application margins.

Voltage rating is a limit, not an operating target

The printed voltage is the maximum the capacitor is designed to support, subject to temperature and ripple rules in the datasheet. A 16V part on a nominal 12V rail can still be wrong if load dumps, inductive spikes, or hot-plug events exceed 16V. Common planning margins:

Typical railOften-seen rating class (starting point, not a law)
3.3V logic6.3V or 10V MLCCs after bias check
5V10V+
12V25V-class electrolytics / adequate MLCC headroom
24V industrial35V-50V depending on surge profile

Electrolytics also need ripple-current and lifetime (hours at temperature) review. Tantalums need strict voltage derating and surge control; reverse them once and you earn a field failure.

MLCC bias and package size--the overseas BOM trap

Two 10uF 6.3V 0603 X5R parts from different makers are not interchangeable without checking bias curves and height. Smaller packages and higher bias voltages usually mean less effective capacitance. If the design needs 10uF effective at 5V, the labeled part may need to be 22uF or a larger case. Put dielectric, voltage, case size, and MPN on the BOM so China purchasing cannot "save money" with a thinner dielectric part.

Polarized parts need clear silkscreen and assembly drawings. Unmarked ceramics rely entirely on reel labels and AOI/polarity processes that do not apply the same way--value control is procedural.

Selection sequence that survives PCBA review

  1. Circuit function and datasheet recommendation
  2. Effective capacitance at bias and temperature
  3. Voltage margin vs worst-case rail
  4. Ripple, ESR/ESL needs
  5. Package that SMT and the enclosure can accept
  6. MPN + approved alternates

For aluminum electrolytic failure modes and layout cautions, see aluminum electrolytic capacitors on PCBA. Send capacitor-heavy BOMs with clear voltage fields through how to place an order.

Treat farads as the energy budget and voltage as the stress budget. Quotes that ignore either are not saving money--they are scheduling debug.

Frequently asked questions

Does a 25V marking mean the capacitor outputs 25V?

No. It is the maximum voltage the part is rated to withstand under specified conditions--not a generated voltage.

Is matching rail voltage to capacitor voltage safe?

Usually not. Leave margin for ripple, surges, temperature, and manufacturer derating curves. A 12V rail often uses 25V-class electrolytics or appropriately derated MLCCs.

Why did my 10uF MLCC measure far less on the 5V rail?

Class II ceramics lose capacitance under DC bias. Effective capacitance can drop sharply; check bias curves and package size, not only the marking.

What must the BOM list for capacitors?

Capacitance, voltage, tolerance, dielectric (for MLCCs), package, polarity if applicable, and manufacturer part number--not value alone.