The traveler said SMT was mature. First articles passed visual AOI. Two weeks later, a fine-pitch QFP on one lot showed intermittent bridges, and a 0.5 mm BGA on the same panel carried voids and head-in-pillow that the camera never saw. A different lot tombstoned 0201s after a paste window drifted overnight. "We have run SMT for twenty years" did not prevent any of those failures.
This article covers how surface-mount technology evolved from hybrid and early chip packages into today's densified lines, and what that history forces buyers to control: stencil and SPI discipline, reflow thermal mass / peak / time-above-liquidus language, AOI versus X-ray coverage, and RFQ clauses that lock process evidence. It is not a station-by-station how-to, not a density pitch deck, and not a turnkey-versus-consignment commercial model.
A short SMT timeline buyers can actually use
Surface mount did not arrive as one invention. Packaging pressure kept removing optical access and shrinking paste windows, so process gates had to tighten.
1970s. Hybrid modules and early chip carriers proved that leads through holes were not the only interconnect. Parts sat on pads; solder paste and reflow began to look like a production path rather than a lab trick.
1980s. Print-and-place automation scaled. SOIC and QFP packages put more pins on the surface with leads still visible to inspectors. Lines learned stencil thickness, paste handling, and oven zoning as industrial controls, not craft.
1990s. Fine pitch, PLCC, and LCCC pushed aperture geometry and placement accuracy harder. Leadless ceramic packages and denser plastic packages made pad design and paste release first-order yield levers. Visual fillet inspection still worked for many leaded parts, but the margin for paste error shrank.
2000s. CSP and BGA moved the joint under the package body. Optical AOI could confirm presence and rough seating; it could not read balls or lands underneath. X-ray and profile characterization stopped being specialty tools and became package-risk necessities.
Today. 0201 / 01005 passives, fine-pitch BGA, QFN/LGA, via-in-pad, and HDI park density leave little recovery after a bad print or a generic oven recipe. SPI, board-specific reflow profiles, and selective X-ray are how modern yield is defended -- not slogans about maturity.
Component and process co-evolution
Pitch shrink is not only a design density story. Each generation forced the line to tighten in lockstep.
When lead pitch dropped, stencil apertures had to reduce without starving pads. Paste rheology, squeegee pressure, and under-stencil wipe cadence became traveler items because a clogged aperture on 0.4 mm pitch is scrap after reflow, not a reprint if SPI is missing.
When packages went leadless or ball-grid, placement accuracy and coplanarity joined paste volume as joint-forming inputs. Warpage on thin boards and large packages created head-in-pillow risk that no post-reflow camera would catch.
When copper mass and layer count rose, thermal mass split the panel: heavy pours and large BGAs lag small chips. A peak that wets the thermal pad can over-stress nearby 0402s if soak and time above liquidus were never measured on that stackup.
The practical rule for RFQs: name the packages that force SPI, named X-ray, and a thermocouple profile. History explains why those gates exist; your BOM decides which ones are non-negotiable.
Modern line stages buyers should recognize
A controlled SMT line still reads as a short chain. Marketing photos of machine brands matter less than whether each stage has response rules.
Print + SPI. Stainless stencil, paste on pads, then solder paste inspection for height, area, volume, and XY offset before parts land. Fine pitch and bottom-terminated packages make SPI a first-article gate. Waive it only in writing after the paste window is proven.
Place. Pick-and-place needs a clean CPL/centroid, polarity that survives finish, usable fiducials, and odd-form notes. Data errors still cause more NPI scrap than brochure placement microns.
Reflow. Preheat drives off volatiles; soak activates flux across uneven thermal masses; peak and time above liquidus (TAL) form the joint; cool-down locks grain structure and limits tombstoning from uneven solidification. Paste datasheet envelopes start the recipe. A thermocouple board that matches your copper mass locks it.
Dual-side / mixed THT. Second-side reflow needs a sequence plan so first-side joints stay controlled. Through-hole connectors, transformers, and high-mechanical-stress parts usually follow SMT by selective solder, wave, or hand iron.
AOI vs X-ray vs electrical. AOI catches visible missing parts, polarity, bridges, tombstones, and many exposed fillets. X-ray reads voids, opens, bridges, and head-in-pillow under BGA/QFN/LGA. Electrical and functional test catch wrong values, high-resistance joints, and product behavior -- inspect is not test.
Defect to likely station
When history moved joints under packages and shrunk chips, root-cause mapping became a buyer skill. Random scrap language ("bad lot") hides which station failed.
| Symptom | Likely earlier station | Why densification made it sharper |
|---|---|---|
| Bridge | Print / SPI (excess paste, slump, open aperture); sometimes place shove | Fine pitch leaves little gap for paste error |
| Tombstone | Print asymmetry + reflow ramp | Tiny chips wet one pad first when volumes or copper differ |
| Void under BTC | Aperture / pad / VIP design + outgassing; confirm with X-ray | Center pads and via-in-pad hide voids from AOI |
| Head-in-pillow (HiP) | Warpage / coplanarity + soak/peak that never coalesced; X-ray | Balls under BGA never enter the camera view |
Map the defect back before you buy another inspection camera. A starved print fixed at SPI is a reprint; the same miss after reflow is scrap or a field return.
When through-hole still belongs
SMT did not erase through-hole. Connectors that take cable yank, board-edge mechanical stress, tall transformers, and some high-current terminals still need plated-hole retention.
On hybrid boards, SMT usually runs first so surface joints form under a controlled profile. PTH work follows with selective solder, wave, or hand solder so the second process does not disturb finished SMT without a plan. Press-fit can replace solder on some mechanical interfaces when the drawing says so.
RFQ clarity: state THT method and sequence relative to reflow. A quote that prices "full SMT" while the BOM still lists pin headers will generate change orders.
RFQ and IPC checkpoints buyers can paste
History explains the gates. The RFQ must name them so quotes stay comparable.
Paste-ready checkpoints (edit to your class and packages):
- State IPC-A-610 class on the assembly drawing (add J-STD-001 soldering expectations when the program requires them).
- Require MSL handling, bake rules, and dry-pack for moisture-sensitive parts on the traveler.
- Require SPI for fine pitch, BGA/QFN/LGA, and Class-risk builds; waive only in writing after the paste window is proven.
- Require a first-article reflow profile plot from a thermocouple board matching your stackup (preheat, soak, peak, TAL, cool) -- not only a paste datasheet screenshot.
- Require AOI scope (pre- and/or post-reflow) and X-ray coverage for named bottom-terminated packages; AOI alone does not inspect balls under a BGA.
- Scope flying probe versus ICT versus functional test as line items; inspect is not electrical proof.
- Send Gerbers, fab notes, BOM with MPNs and approved alternates, CPL/centroid with rotations, and paste lot plus machine IDs on the traveler for audit trail.
Do not demand fake factory yield percentages. Demand artefacts: SPI windows, profile plots, sample X-ray images for named BGA pitch, and class language on the drawing.
Related XFPCB guides
- SMT PCB assembly process: paste print to reflow, AOI, and test -- station how-to and parameter pack
- SMT high-density PCB design benefits -- why densification is chosen in design
- PCB inspection methods guide -- SPI, AOI, X-ray, and electrical coverage
- Full turnkey vs consignment PCB assembly -- commercial sourcing model after process gates are clear
- How PCBs are made -- bare-board fab flow before assembly starts
SMT matured by packing more joints into less space and hiding many of them under packages. Yield today follows print discipline, profiled reflow, and inspection matched to package risk. Write those controls into the RFQ; maturity slogans will not catch a void or a 0201 tombstone after the fact.