On-time delivery for printed circuit boards is not a brochure slogan. It is a contract between a frozen traveler and a calendar that both sides understand the same way. Just-in-time (JIT) language shows up in many manufacturing pages: smaller deliveries, flexible floors, fast setups, certified suppliers, stop-when-done. Those ideas matter. They do not tell a China fab buyer which RFQ fields protect a ship date, how working days differ from calendar days, when holiday and laminate buy buffers belong on the quote, or what must freeze before the clock starts. This factory buyer guide covers what JIT and on-time delivery (OTD) mean for PCB programs, which RFQ fields protect dock dates, practical China fab buffers without inventing plant turnaround tables, and what buyers lock so freight and dual-source actually help — with a soft path to a structured RFQ when the fit is clear.
What JIT and OTD mean for a PCB program
In PCB practice, JIT is less about emptying a warehouse overnight and more about matching fab output to a stated need without padding idle inventory or silent schedule risk. OTD is the measurable outcome: boards leave the fab (or reach the dock under agreed Incoterms) inside a date window both parties accepted.
Thin marketing pages often rest JIT on three management pillars — production, quality, and people — then list features such as need-sized deliveries, flexible cells, rapid changeovers, and supplier-certified incoming. Those themes are real. For a buyer running multilayer FR-4, HDI, flex, or PCBA through a Shenzhen fab, the operational questions are sharper:
- Does the promised date start at PO cut-in, at CAM freeze, or at material-on-hand?
- Are lead times quoted in working days or calendar days, and who owns Chinese public-holiday gaps?
- Is “on time” measured at production complete, at airport handover, or at your receiving dock?
- What happens to the clock if Gerber, stackup, finish, or test depth changes after award?
JIT without frozen scope is just urgent chaos. OTD without shared clock rules is a dispute waiting for a freight invoice. Buyers who only compare brochure turnaround tags often miss that two shops quoting the “same” week can mean different start events, different holiday math, and different freight assumptions.
Commodity-class date windows used in broader supply-chain practice (tighter early/late bands for higher-value A items, wider bands for C items) are a useful reminder that “on time” is often a range, not a single midnight. PCB programs should still write the range explicitly: early ship allowed or not, late grace in days, and whether partial lots count. Do not assume the fab’s ERP and your MRP share the same A/B/C table unless you put it on the PO.
JIT in PCB sourcing also shows up as lot sizing discipline. Need-sized deliveries can mean weekly or call-off releases instead of one oversized ship that sits in a bonded warehouse. That only works when each release still carries a reserved panel window and a frozen revision. Splitting quantity without splitting capacity planning creates five small late lots instead of one large late lot.
Quality management under an OTD program is not a separate brochure chapter. Escape rates at electrical test, AOI, or incoming directly burn calendar. A shop that runs fast setups but weak process control will miss promised dates through rework and scrap as surely as a shop that never booked the press. People management matters too: CAM, planners, and line leads who share one revision owner and one date grammar reduce the “sales said X / shop said Y” gap that kills OTD scorecards.
Calendar days, working days, and promised dates
Three clocks collide on almost every overseas PCB RFQ.
Required date is when you need boards for SMT, a customer dock, or a pilot build. It is a demand date. It is not automatically a fab promise.
Promised date is what the fab commits after seeing files, materials, capacity, and freight mode. Best practice is to manage OTD against the promised date — not against an aspirational required date the shop never accepted.
Calendar vs working days is where China fab programs most often break. Many buyers mentally count calendar days from PO send. Many fabs quote working days from CAM approval or from material ready, excluding weekends and local public holidays. Spring Festival, National Day, and other multi-day shutdowns can erase a week of floor time even when the quote string still says “X days.” If the RFQ does not force the shop to state clock start, holiday treatment, and whether freight days are inside or outside the fab window, you are comparing apples to orange crates.
Also separate production-complete from deliver-to-dock. Express air can compress transit; it does not invent missing laminate or unfinished plating. A JIT mindset that only compresses freight while leaving material buy and panel schedule vague will still miss the dock.
Write the date grammar once on the RFQ and reuse it across bidders:
- Clock start event (PO cut-in / CAM freeze / kit complete — pick one primary).
- Working-day vs calendar-day basis.
- Holiday buffer ownership (buyer-added cushion vs fab-included).
- Production-complete vs Incoterms dock date.
- Early-ship and late-grace rules.
Synchronize those five fields periodically on call-off programs. Silent drift between buyer MRP and fab traveler is a classic OTD failure mode that no amount of “flexible floor” marketing fixes.
Data synchronization deserves its own buyer habit. On call-off or kanban-style PCB programs, refresh the promised-date fields whenever quantity, freight mode, or holiday calendars change. A quarterly sync is better than none; a lot-by-lot confirmation on critical SMT gates is better still. Email threads that redefine “next Thursday” without updating the traveler are how calendar assumptions diverge while both sides still believe they are aligned.
China fab RFQ fields that protect ship dates
Use these as buyer fields. Compare answers on the same table. Do not invent XFPCB turnaround-day menus — process risk, stack, finish, and capacity differ by lot.
1. Lead-time basis. Ask whether the quoted days are working or calendar, and what event starts the clock. “From order” is ambiguous; “from CAM approval with frozen revision Rxx” is actionable.
2. Holiday and shutdown calendar. Require the fab to flag known multi-day holidays inside your planning horizon, or to state that holiday days are excluded from the working-day count. Add your own buffer on critical SMT slots rather than hoping the factory absorbs every festival.
3. Material buy and AVL. Special laminates, thick copper, controlled-impedance coupons, and non-stock finishes often sit on buy lead time before any panel enters drill. Ask whether the quoted window assumes stocked FR-4/finish or includes procurement. If your AVL names a specific laminate brand and glass style, say so — substitutions can reset both schedule and impedance risk.
4. Panel and lot schedule. Who owns array design? When does the panel book into press/drill capacity? Can the shop reserve a window against a call-off, and what notice is needed to pull a lot forward or defer? JIT deliveries still need a panel schedule; “smaller deliveries” without reserved cells become queue gambling.
5. ECO and revision lock. Mid-lot copper, via, mask, or test changes usually reset CAM and can reset the promised date. Name a single revision owner on each side. Open EQs are NPI work; they are not free JIT.
6. Test and class depth. Flying probe vs fixture, sample vs 100% electrical, coupon/microsection depth, and AOI/X-ray/FCT where assembled — all written once. Adding Class-driven microsections after award is a scope and calendar change.
7. Freight mode and Incoterms. State air vs economy, who books, and whether transit days sit inside the OTD metric. Moisture-barrier packing and carton rules matter when boards go straight into SMT.
8. Dual-source buffer language. If a second fab holds the same frozen revision, say how load splits on a slip, and that both shops price equal stack/finish/test depth. Dual-source is capacity insurance, not a compliance workaround for domestic-only work.
What buyers lock so on-time is real
JIT features (need-sized lots, flexible cells, fast setups) only help after the buyer locks the inputs the floor cannot invent.
Frozen Gerber / ODB++ and fab notes. One revision ID covering stackup, copper weights, via plan, mask, finish, impedance notes or an explicit waiver, class, and test depth. “Almost final” files produce almost-final dates.
PO cut-in clarity. Quantity, price, revision, promised-date grammar, Incoterms, and ship-to. Soft forecasts without a purchase event rarely get hard capacity. Call-off programs should still define lot sizes, release lead times, and cancellation rules.
Material and specials decided. AVL or approved-equivalent rules stated. Non-stock items flagged with buy days visible on the quote.
Freight chosen before the promise. Changing from economy to express after a slip is recovery, not planning. Write the default mode on the RFQ; allow expedite as a priced option with a new promised date.
Incoming inspection plan. Board count, moisture, flatness, and electrical sample at receiving affect when SMT can start. OTD to your dock is incomplete if incoming holds the lot for missing paperwork the RFQ never required.
Buyers who chase JIT by only compressing the last mile while leaving Gerber churn and TBD finishes open are not running just-in-time — they are running just-in-case expedites.
For assembled product (PCBA), lock the same ideas one layer deeper: kit completeness, consigned vs turnkey parts, and whether the OTD metric is bare-board dock, assembled ship, or both. A JIT fab promise on bare boards does not rescue a kit that is missing connectors. State which milestone your program actually needs, and do not let a soft CTA on “full turnkey” blur the date you will measure.
Dual-source and logistics buffers without invented TAT
Dual-source helps OTD when both fabs can run the same frozen revision with correlated incoming results. It fails when one shop holds an old stack note, a different finish dwell, or a lighter test depth. Qualify both on one package; keep AVL and NDA gates equal; do not treat the second source as a silent dump for ECOs the primary rejected.
Logistics buffers are program math, not marketing:
- Production-complete → freight booking → transit → customs where applicable → incoming → SMT release.
- Add holiday and weather risk on the lanes you actually use.
- Keep a small finished-goods or WIP buffer only where the product economics justify it — JIT does not forbid all inventory; it forbids unplanned inventory caused by unclear clocks.
Never paste a generic “X-day China fab” claim into a program plan. Ask for a promised date on this revision, this quantity, this material readiness, and this freight mode.
When you score RFQs, put clock honesty above a one-line turnaround badge. A slightly longer promised window that names working days, holiday exclusions, and material-ready assumptions usually beats a short window that starts on an undefined “order date” and silently excludes laminate buy. Ask bidders to restate your five date-grammar fields in their own words on the quote. Shops that cannot restate them will struggle to meet them.
Rank suppliers on clock honesty and scope match first; unit price second.
Soft next step
If your program is commercial, files can freeze, and a China fab menu fits the stack and finish, send a structured OTD RFQ: working-day basis, clock start, holiday treatment, material buy assumptions, panel schedule ownership, revision lock, test depth, freight/Incoterms, and dual-source rules if you use them. XFPCB can respond on that field table when you are ready — without brochure turnaround tags standing in for a promised date on your traveler.