PCB assembly (PCBA) is the factory work that turns a finished bare board into a populated, soldered, inspected, and — when specified — tested assembly ready to ship. It is not fabrication of the laminate stack. Fabrication drills and plates copper; assembly places parts, forms solder joints, and gates quality before the unit leaves the plant. Buyers lose time when quotes assume different kit ownership, skip DFM, or treat SPI/AOI/X-ray/ICT as optional “nice-to-haves” without writing the decision gates into the RFQ.
This guide maps the end-to-end China PCBA journey for buyers: files and kit gates before the line starts, SMT and through-hole (THT) order, when each inspection or test is required versus sample-only, optional conformal coating, and an RFQ matrix that keeps competing quotes comparable. For SMT stage detail alone, use SMT PCB assembly process. For machine-by-machine capability questions, see PCB assembly equipment list.
Answer first: what “PCB assembly works” means on the traveler
| Buyer phrase | What the plant actually does | What it is not |
|---|---|---|
| PCB assembly / PCBA | Populate + solder + inspect/test a finished bare board | Making the bare PCB (etch, drill, plate, mask) |
| Turnkey PCBA | Plant buys parts (and often fab) to your BOM | You shipping a full kitted reel set |
| Consignment / partial kit | You supply some or all parts; plant assembles | Zero kit-risk if MPN, date code, or qty is wrong |
| First article | Prove paste, place, profile, and test hooks once | A free unlimited ECO loop |
One-line definition: PCBA starts when a verified bare board and a verified kit meet a written traveler — not when a salesperson says “we do SMT.”
Bare-board process context (different page, different intent): How PCBs are made.
💡 Procurement Pro-Tip: Put “assembly only” vs “fab + assembly” and “turnkey / consignment / partial” in the first RFQ line. Those three words change lead time, NRE, and who owns shortage risk more than any machine brand list.
Gate 1 — Files and DFM before the line starts
A capable plant will not start paste print until the file package is complete enough to program printers, placers, AOI, and (if needed) ICT. Incomplete packages create “rush” stops that look like capacity problems but are really data problems.
| Deliverable | Why the line needs it | Typical fail mode if missing |
|---|---|---|
| Gerber (or ODB++) + fab notes | Pad geometry, mask openings, board outline | Wrong stencil apertures; mask-defined pad surprises |
| BOM with MPN + alternates | Buy or receive exact parts; flag lifecycle | “Equivalent” parts that change footprint or height |
| Centroid / CPL (XY, rotation, side) | Pick-and-place program | Manual rotation guesswork; polarity flips |
| Assembly drawing / legend pdf | Polarity, keep-outs, press-fit, hand-solder notes | Wave heat on sticky SMT; wrong connector orientation |
| Stencil / paste notes (if any) | Step-stencil, home-plate pads, no-paste vias | Insufficient or excess paste on fine pitch |
| Test spec (ICT / flying probe / FCT) | Fixture NRE and coverage rules | Quote assumes visual only; field failures later |
DFM gate (decision): Required before volume and before any fine-pitch or BGA first article. Optional only for trivial coarse-pitch SMT with known yield history — and even then a short DFM email is cheap insurance. Expect feedback on paste volume, tombstone risk, QFN/BGA thermal pads, connector keep-outs for wave/selective, and whether bottom-side SMT needs adhesive if THT wave follows.
⚠️ Watch Out for: “Gerber + BOM is enough” quotes on mixed SMT+THT boards. Without CPL and an assembly drawing, two plants will invent different rotations and THT solder methods — then argue about polarity scrap after the PO.
Gate 2 — Kit readiness (turnkey vs consignment)
Assembly cannot start until the kit matches the BOM revision: correct MPN, quantity with attrition, moisture sensitivity (MSL) bake plan, and polarity marking rules. Kit ownership decides who absorbs shortage and counterfeit risk.
| Model | Who buys parts | Buyer risk to watch | When it fits |
|---|---|---|---|
| Full turnkey | Plant (sometimes including bare boards) | Lock AVL, date-code policy, and substitute approval | Most China volume and NPI when AVL is clear |
| Full consignment | You ship the complete kit | Short kits, wrong reels, expired MSL, customs delays | You already own inventory or controlled AVL stock |
| Partial kit | Split by line item | Ambiguous ownership on long-lead ICs | Hybrid: plant buys passives; you buy CPU/FPGA |
Brief rule: turnkey shifts logistics to the plant but needs a written AVL and substitute process; consignment keeps your AVL control but makes you the bottleneck when a reel is short or mislabeled. Depth: Full turnkey vs consignment PCB assembly.
Kit gate (decision): Mandatory checklist before first paste print — BOM rev match, qty + attrition, MSL bake if required, connector/crystal polarity samples, and “do not place” ECO list. Starting the line on a partial unverified kit is how first articles burn schedule twice.
Full flow map — not only the SMT four boxes
A buyer-facing traveler is longer than paste → place → reflow → AOI. Mixed boards and options change the sequence.
| Stage | What happens | Typical decision gate |
|---|---|---|
| 1. File + DFM | CAM, stencil design, program place/AOI | Hold if CPL/BOM/assy drawing incomplete |
| 2. Kit + bake | Receive/buy, IQC, MSL bake | Hold if shortage or wrong MPN |
| 3. SMT (often bottom then top) | Print → SPI → place → reflow | SPI coverage % by pitch/package |
| 4. THT / odd-form | Insert → wave and/or selective and/or hand | Method map per refdes; adhesive/pallet if needed |
| 5. Clean / no-clean | Wash if required by flux/cleanliness class | Required for some coatings and high-impedance nodes |
| 6. Inspect / test | AOI, X-ray, ICT/flying probe, FCT | Mandatory vs sample — see next section |
| 7. Optional coat / underfill | Conformal coat, selective coat, underfill | Environment and reliability class drive need |
| 8. Pack + ship | Moisture barrier, labels, packing list, CoC | Traceability and IPC class on the PO |
Mixed SMT + THT order: SMT first (often bottom then top with reflow), then THT insertion, then wave/selective/hand, then wash if needed, then coat/test/pack. Confirm adhesive or pallets when bottom SMT must survive wave heat. Decision depth: SMT vs DIP (through-hole) PCB assembly.
Optional conformal coating is a real process step with keep-outs, cure, and thickness — not a shipping afterthought. If humidity, condensation, or contamination is in the use environment, put coat type and keep-outs on the RFQ; do not assume “assembly” includes it.
When each inspection and test is mandatory vs optional
Inspection language without coverage rules produces brochure quotes. Write the gate, not the brand name.
| Method | Usually mandatory when… | Often optional / sample when… | Put on the PO |
|---|---|---|---|
| SPI (solder paste inspection) | Fine pitch ~0.5 mm and below, micro-BGA, fine QFN, new stencil FA | Coarse-pitch discretes with proven stencil | Coverage % (e.g. 100% FA, then X%) |
| AOI | Almost all SMT production after reflow | Extremely low-mix hand builds (still risky) | Side coverage; escape criteria |
| X-ray | Hidden joints: BGA, many QFN/LGA, some connectors | Open-lead packages only; proven yield | Sample plan or 100% for BGAs |
| Flying probe | NPI / low volume electrical opens-shorts | High volume once ICT fixture exists | Net coverage expectations |
| ICT (in-circuit test) | Stable volume with bed-of-nails pads | Early NPI (fixture NRE not paid yet) | Fixture ownership + coverage |
| Functional test (FCT) | System behavior ICT cannot see; safety-critical | Pure interconnect boards with ICT only | Fixture, firmware load, pass criteria |
| Visual / IPC-A-610 | Always as acceptance class baseline | Never “instead of” AOI on dense SMT | Class 2 vs Class 3 explicitly |
Practical buyer rule: SPI for paste-critical packages; AOI as default SMT gate; X-ray whenever joints are hidden; flying probe or limited FCT for NPI; ICT when volume amortizes the fixture; FCT when firmware, sensors, or power rails must prove behavior. Machine context: PCB assembly equipment list.
⚠️ Watch Out for: Quotes that say “100% AOI + X-ray available” with no package list. Availability is not a traveler. Tie X-ray to BGA/QFN refdes and SPI to pitch thresholds so both bidders price the same gates.
China PCBA RFQ matrix (keep quotes comparable)
Two plants can both be “capable” and still non-comparable if kit model, sequence, and test coverage differ. Fill these fields once; paste them into every RFQ.
| RFQ field | Why it changes price / risk | Example lock |
|---|---|---|
| Scope | Fab+assy vs assy-only | Fab + turnkey PCBA |
| Kit model | Shortage and AVL ownership | Turnkey; AVL attached; no silent substitutes |
| Qty + FA | NRE and attrition | 5 FA + 500 production |
| Finest pitch / packages | SPI, nozzles, profile, X-ray | 0.4 mm QFP; 0.5 mm BGA; list QFN |
| SMT sides + THT map | Sequence, adhesive, selective | Double-sided SMT; 24 THT pins selective |
| Alloy / nitrogen | Profile and joint reliability | SAC305; N2 if required |
| IPC class | Accept / reject and rework cost | IPC-A-610 Class 2 |
| SPI / AOI / X-ray | Coverage drives equipment time | SPI 100% FA; AOI 100%; X-ray all BGA |
| ICT / FP / FCT | Fixture NRE and who owns it | Flying probe FA; ICT at volume — buyer owns fixture |
| Coat / underfill | Extra process and keep-outs | None / acrylic selective / underfill U1 |
| Pack + docs | Traceability and customs | CoC, packing list, MSL bag if needed |
| Lead time clock | When the clock starts | Clock starts at kit + file approval, not PO alone |
Soft next step: If you need a China PCBA partner to walk this traveler with you — files, kit model, mixed SMT+THT sequence, and written inspection gates — XFPCB can quote against a filled matrix so bids stay comparable instead of optimistic.
Related reading
- SMT PCB assembly process — stage-level SMT detail
- PCB assembly equipment list — what each machine does and buyer requirements
- SMT vs DIP PCB assembly — mixed-tech order and wave vs selective
- Full turnkey vs consignment PCB assembly — kit ownership and risk
- How PCBs are made — bare-board fabrication (upstream of assembly)